ann-arcana

Queen of Burgers 🍔

Writer, game designer, engineer, bisexual tranthing, FFXIV addict

OC: Anna Verde - Primal/Excalibur, Empyreum W12 P14

Mare: E6M76HDMVU
. . .



techokami
@techokami

Recently, Gravis made one hell of a dive into the horrible abuse of the BIOS to make a bootleg hypervisor, and then went even deeper to find truly cursed usage of forbidden processor features. User DecayWTF had a few things to add to this, and I wanted to add on further, but... well, I didn't want to hijack the thread. I've been putting this off for far too long, and now I'm going to finally get around to doing something I said I was going to do a few months ago.

Welcome to the first installment of my article series called "Education Yourself". This series aims to highlight the weird, failed, obscure, and interesting aspects of computing and technology history, usually in an entertaining tone with a short-ish length. I might go kind of fast, but I do hope that you get a kick out of this, and learn something new along the way. So sit back, relax, and prepare to be horrified when I tell you that your modern Intel or AMD x86-64 CPU... is not x86-64.

EDUCATION

YOURSELF

Episode 001


techokami
@techokami

Am I perfect? No I'm just a wolf. I'm also not one that has looked at leaked internal docs or broken blood-oath NDAs either, so I wasn't 100% sure about some details. I'm going to use this to highlight some new information that has come to light, and add in one more thing that I forgot to add into the original piece, but looking back... where would I add it? Eh. Click the Read More to begin.


Correction 1: AMD's Legacy

Okay so I thought that the Am29000 was the core used for all the successor x86 CPUs AMD made. But apparently, it was considered a "dead end" after the K5. To solve this, AMD bought out another semiconductor company, called NexGen, back in 1995, and had them handle the microarchitecture (or internal core as I called it) for their CPUs. NexGen, when they were indepenent, were in fact making microcoded x86 implementations like I had described. When AMD bought up NexGen, they halted development of their own in-house K5 successor and instead made NexGen's in-development designs take up the mantle.

So... I was kind of right, but instead of being based on a known architecture, it's actually another mystery RISC design.

Correction 2: What ME/PSP Run On

Running Management Engine/Platform Security Processor on a completely independent CPU core embedded within the CPU itself sounds absolutely wasteful and bonkers, yet a bunch of people have said that this is, in fact, the case? Intel's ME is apparently running on a tiny 32-bit Pentium-based core, and AMD is using... an ARM core?! [Considering how batshit insane Arm currently is](https://www.theregister.com/2023/03/25/arm_ipo_license/) this seems like a Very Bad Idea. Who will be responsible for footing the bill of using ARM cores inside AMD CPUs? If it's the people using the AMD CPUs, then *HOOOO* this is going to be ugly. OEMs are going to run from Zen... oh crap and both the current Xbox and Playstation systems use modern AMD CPUs! Microsoft and Sony will not like that one bit.

Addenum: MIPS' Party Trick

The Nintendo 64 used a MIPS processor, a NEC derivative of the R4300i. It is microcoded, but you can *replace the microcode.* The code can go up to the CPU as it is waking up, pull out a knife and *lobotomize the CPU* to replace it with its own set of custom instructions, then let the CPU execute very non-standard code. That seems like something nobody in their right mind would actually do... but I don't think that's a category where Factor 5 falls into.

One of my favorite N64 games of all time is Star Wars: Rogue Squadron. Think of it like Star Fox 64, except the maps are larger with more detail, and you're always in All Range Mode. It's really good! And I'd love to be able to play it again! My N64 is buried in my basement and I don't have a TV that can support it. So, why not emulation? N64 emulation has gotten pretty damn far. Except... yeah you know where this is going.

N64 emulation is generally done in the form of "High-Level Emulation", or HLE. That is, the instructions for the MIPS processor are directly mapped to instructions on the host CPU. This is less of an emulation and more of a translation layer, and is locked to the default instruction set of the processor being emulated. For the large majority of N64 games, this is perfectly fine! It's why you can play Super Mario 64 and Mario Party and Super Smash Bros. just fine with emulators. But make it run Rogue Squadron? This is where it all falls apart. The code to replace the microcode just won't work! And then the HLE tries to map out incorrect instructions and everything just errors and/or crashes. To get this game to work, you need to use "Low-Level Emulation", or LLE, to simulate the entire R4300i CPU. This requires significantly more processing power and resources to accomplish the same goal, and well... it will work, but I don't think single-digit frames per second would be considered playable.


You must log in to comment.

in reply to @techokami's post:

probably not, with the way ARM is getting greedy lately and wants to charge licensing fees as a percentage of the product cost on anything its tech is put in. AMD would be better off using their own internal RISC systems, like Intel and GPU manufacturers do; so I think your take that it's a descendant of the Am29000 series is right, here

my understanding with the ME, at least on intel is it’s not running on the main cpu at all, it’s a coprocessor. Modern high performance ARM CPUs work basically the same as modern high performance x86 CPUs and their microcode doesn’t necessarily resemble any standard instruction set. It’s also worth mentioning that the K5 architecture was a dead end and the K6 and all successors are not derived from it or the Am29000; the K6 design team was from an external company called NexGen that AMD bought.

Huh! Didn't know that about Am29000. Intel and AMD tend to not like to talk about their microarchitectures that much (trade secrets and all) but NexGen being pulled in-house to do the new microarches... interesting. Thank you!

I was going to ask a question about if the K5 was based on design work done by NexGen before they were bought by AMD, but turns out that was the K6. Glad I didn't post that before looking it up because I was going to look stupid! :-)

Good post.

EDIT: I DIDN'T SEE THE FOLLOW UP POST I WAS A FOOL AFTER ALL

in reply to @techokami's post:

as far as I understand, on the N64 "custom microcode" refers to the GPU microcode, not CPU. MIPS were at least initially quite direct-in-hardware CPUs so it would be a bit surprising if it could do microcode swap like that. you might find the architecture of Xerox Alto interesting tho – it implements stuff like DRAM refresh using microcode tasks that can interrupt the normal code execution, and iirc it had microcode RAM you could load your own into at runtime

Okay one more comment on the N64 microcode: I know that all of the docs call it microcode, but I looked at the RSP processor manual a while back and personally would not consider it microcode. The “microcode” runs on the RSP, which is basically a 32 bit MIPS core with a special SIMD extension set for efficient math and media processing. Importantly though, it’s basically an ordinary MIPS core other than that, though a different one than the main CPU. It runs normal MIPS instructions with normal flow control and such, besides the SIMD stuff. Presumably they called it microcode to reflect that it was a binary blob you were generally not intended to modify and you only had about 1K instructions to work with and could only program it in ASM. There were user-microcodeable CPUs, especially in the 70s and early 80s in the Big Computer Space, and I’ve written a bit of microcode for one of them, the Xerox Alto. It’s a very different experience; you’re basically operating each functional block of the CPU in parallel, flow control is strange and hard (based on ORing bits into the branch destination on the Alto) and if you make a mistake you can hard-lock the entire system unrecoverably (because you have to check for interrupts by hand!) The Alto also has a weird architecture where the CPU is a combination CPU/blitter, DRAM refresh circuit, video controller, hard disk controller, and Ethernet adapter, all of which is handled by COOPERATIVELY MULTITASKING MICROCODE. So that’s another thing you have to watch out for.

Sorry for another AcTuAlLy, but...

x86 has been microcoded since the beginning. That's why the 808x took 4 cycles per instruction at least(CORRECTION: Some instructions took 2 cycles) and not 1, it's as fast as the microcode could work. See: http://www.righto.com/search/label/8086, specifically https://www.righto.com/2022/11/how-8086-processors-microcode-engine.html

also that amd arm thing... can this be the return of the ol' AMD-but-actually-Cyrix Geode CPUs?