liz ten eleven@selectric11/18/2022, 11:25 PMiximeow@iximeowiximeow@iximeow11/18/2022, 11:24 PMstoring my code in the CPU-memory L2 orbit cache
@acfoltzer11/18/2022, 11:30 PMfor PCI compliance, sensitive user data MAY be stored at L1, L2, or L3, but must NOT be stored at L4 or L5login to reply
protected concerted activity enthusiast@BlueSpaceCanary11/19/2022, 3:37 AMi see your plan to stop playing TI is going welllogin to reply