simulation of the next revision of the CCD input stage. here it's amplifying a 1 mV difference between pixels (top blue line; every other trough in the waveform is ever so slightly lower) to most of full-scale for the ADC (bottom red line). extremely fiddly because that's a gain of roughly 270 and the spikes in the CCD output when the output buffer resets are not very nice to op amps.
next step is making it practical. if i built this as-is (substituting emitter followers on voltage dividers for the Vclamp and Voffset sources or something) there would be a total of eight trim points, four of which have to be adjusted in matched pairs, and then multiply by 3 because there are 3 ADC channels. would be a total pain in the ass to tune up and that's assuming nothing in there gets temperature drift. need to either massively simplify those op-amp gain stages or set up a system to let the microcontroller automatically trim it
